At 01:41 PM 11/1/2005 -0800, you wrote:
>Has anybody used this TI PDF 8575 chip?
>
>http://focus.ti.com/lit/ds/symlink/pcf8575.pdf
>
>I'm working on a very low power application where we need a few more IO pins
>than what we can get on the microcontroller and the project lead is
>recommending this. It's basically an I2C addressable shift register, but it
>claims to allow any pin to be an output OR an input without having to set
>any direction bits. (!!!)
>
>I can't get my head around how it can have pins that are inputs, and others
>that are outputs without any direction registers in it. As far as I can see,
>it drives any pin that you write out a 1 to with 1mA to the Vcc rail. So

I see 100uA, with a pretty huge tolerance (~3:1 in either direction)

>they are fairly easy to overcome with an input that may need to drive that
>pin low. Sort of the standard open collector with a pull up deal. No problem
>so far.
>
>But then they have something called IOHT that drives any pin that set high
>hard to Vcc until after the last clock.
>
>"An additional strong pull-up to VCC (IOHT) allows fast rising edges into
>heavily loaded outputs. This device turns on when an output is written high
>and is switched off by the negative edge of SCL"
>
>So what are we saying? That its ok for some other device that is trying to
>drive a low into one of these pins to drive against the supply rail as long
>as you only do it for a little while?

Yes, this is in the form of the *execrable* (IMHO) psuedo-bidirectional I/O of
the original 8051.

>His statement is that this will require less power over all than will any
>standard available shift registers. Isn't even the 1mA pull up going to suck
>down the juice for any input that happens to be a zero?

Yes, indeed, though I think it's 100uA. Note also that the CMOS input draws
extra current (200uA per unit) if the input isn't very close to one rail or
the other. That's normal with CMOS, of course.

>Not to mention the
>ton of juice whenever we write out new values to the output pins and that
>zero gets driven high at full power for the time between the bit and the
>last clock?

That won't amount to much, since it's for such a short time, and it's only
1mA total per input typical (No maximum).

>Am I missing something here?
>
>I've been looking for a set of good low power shift registers (one in and
>one out), and I have to admit, I can't find anything that will pull less
>than about 100uA in normal operation (not including what ever it is driving
>as an output). This PDF 8575 has an Icc of 75uA or less in operating mode
>and will standby down to around 3uA.
>
>Help?

Why can't you just use regular garden variety CMOS (HC or LVC) logic and an
SPI port (hardware or bit-banged)? Cheap & easily available, now and 5
years from now.

74HC595, for example, even at full temperature and 6V Vcc is rated for 80uA
maximum. It will be much less typically. The 74LV595 is 20uA maximum at 5.4V
over temperature. It will be much less typically.

I really hate specifying single-sourced stuff if there's any reasonable
way around it.

Best regards,

Spehro Pefhany --"it's the network..."            "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com
->> Inexpensive test equipment & parts http://search.ebay.com/_W0QQsassZspeff


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