Hi Jesse,

See Microchip app note AN521

-- Mark

> -----Original Message-----
> From: piclist-bounces@mit.edu [mailto:piclist-bounces@mit.edu]On Behalf
> Of Jesse Lackey
> Sent: Wednesday, October 26, 2005 1:24 PM
> To: PICLIST@mit.edu
> Subject: [EE] Inputs over Vdd / under Vss with current-limit
> resistors... ? and "input clamp current" spec?
> 
> 
> Hello all,
> 
> I have a design whereby I want to sense the presence or absence of a 
> voltage that is well above +5V; maybe up to 15V, say.  This voltage 
> could be negative as well, at least until the user figures out they have 
> their DC input backwards...
> 
> I also want to use A4 to switch a pfet, and when the pfet is not being 
> driven (i.e. A4 set to high, i.e. floating) it will be pulled up to 9V 
> or so through 100K.
> 
> Now reading the absolute max ratings, of course, you can't do either of 
> these things.  Any pin except A4/MCLR is Vdd+0.3V max; A4 is 8.5V max.
> 
> There is another spec that says input clamp current (IIK (VI < 0 or VI > 
> VDD)) is +-20mA.  (This is the 18F1220/1320 datasheet FWIW.)  I presume 
> this doesn't mean the PIC clamps the current to +-20mA... what does it 
> mean, exactly?
> 
> So, if I current limit to a milliamp or less, maybe even .1mA, am I ok 
> here?  I don't see the harm in forward-biasing the input protect diodes 
> with a small current, but then again I don't know much about chip design 
> norms...
> 
> I can add transistor switches etc. if need be, but if the above is 
> workable it is definitely preferred.
> 
> This is going to be a commercial product, so unfortunately solutions 
> that "cheat" and will "normally work at least for awhile" aren't going 
> to cut it...
> 
> Thanks for any tips...
> Jesse
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