In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Coriolis wrote: Ok I was confusing SPI modes both 0 and 3 clock the data in on rising edge at the slave, so the bit about SCK being low for HOLD is still true. ---------- End of Message ---------- You can view the post on-line at: http://forums.parallax.com/forums/default.aspx?f=7&p=1&m=90255#m92813 Need assistance? Send an email to the Forum Administrator at forumadmin@parallax.com The Parallax Forums are powered by dotNetBB Forums, copyright 2002-2005 (http://www.dotNetBB.com)