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Unfortunately I did not write the original code (asm or PBPro). I have 
not even started to write the new code. Memory requirements that I have 
calculated come from the fact that there are some data tables which have 
to be included within the PBPro code. The addition of these tables alone 
will exceed the available memory.

Your additional notes will help. Thanks.

Nino.

Olin Lathrop wrote:

> Nino Benci wrote:
>
>> I have just received a project which originally used the 16F877A. The
>> bulk of the code is in assembler with the user interface written in
>> PBPro. The client wants to add extra features and functions to the
>> existing code base. In doing so I will exceeded the memory capacity of
>> the 877A. I am looking at the 18F4520 as a replacement. The portions
>> written in PBPro are easy to migrate but about 75% of the code is in
>> assembler (although well documented). Aside from jumping in head first
>> and going blind into the project are there any issues or pointers that
>> would make life a whole lot simpler that I should look at before I
>> proceed.
>
>
> It's a bit late to ask this question.  You should have thought about this
> when writing the code in the first place.  My PIC development environment
> (http://www.embedinc.com/pic), for example, makes it easy to write 
> code that
> requires minimal work to move between PIC types.
>
> Fortunately for you, going from native PIC 16 to PIC 18 is easier than 
> the
> other way around.  Here are a few issues I can think of even if just 
> wanting
> to make PIC 16 code run on a PIC 18 without making use of any of the 
> new PIC
> 18 features.  There are probably others, this is off the top of my head:
>
> 1 - RLF and RRF become RLCF and RRCF.  Yes I think it's stupid too that
> Microchip changed the name although the instructions do exactly the same
> thing.  Two macros can take care of this.
>
> 2 - INCF and DECF now effect C.
>
> 3 - All FSR and INDF accesses need to be examined.  The PIC 18 has 3 
> FSRs,
> and they are each the full 12 bits wide.  This means both bytes must 
> be set,
> but there are no longer indirect banks.  INDF is now called INDF0 since
> there are two more (INDF1, INDF2).  A macro for INDF can take care of 
> this,
> but all manipulation of FSR must be examined manually.
>
> 4 - The interrupt vector is 8 instead of 4.  You should consider redoing
> your interrupt routine by starting with my QQQ_INTR18.ASPIC template, 
> then
> copying only the meat of the old interrupt routine into the new one.
>
> 5 - Banks are now 256 bytes long instead of 128, and the method of 
> setting
> the current bank is totally different.  The bank is set in the BSR 
> register,
> no longer by setting RP0/RP1 in STATUS.  This will be your single biggest
> hassle and possible source of creeping bugs if your code was written 
> badly
> and manually set banks by manipulating RP0 and RP1 directly.  Now 
> would be a
> good time to do it right and use something like my DBANKIF and related
> macros.
>
> The PIC 18 can do a lot of other cool things, but you can ignore them 
> just
> to get PIC 16 code minimally running.
>
>
> *****************************************************************
> Embed Inc, embedded system specialists in Littleton Massachusetts
> (978) 742-9014, http://www.embedinc.com


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title:Professional Officer
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