PicDude wrote :

> So you're saying that with the TMR0 enable bit cleared, the 
> TMR0IF's are really still generated,...

"Generated" is the wrong word, "set" is correct.
And there is just *one* TMR0IF flag.

This is by design, and realy the only reasonable way
it could work. Note that you *might* want to service the
TMR0 overflow later (after re-setting the xxxIE flag), right ?

> but masking the TMR0 enable bit just 
> causes the TMR0IF flag not to generate an interrupt?

As has been explained in *all* replies to this thread...

And checking the xxxxIE flags in the ISR *is* the way
to go.

Regards,
Jan-Erik.



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