On 10/4/05, Chen Xiao Fan wrote: > I think you are using the ADCs out of specification. > There need to be 2V gap between the VREF+ and VREF-. > > Datasheet of 16F87/88 DS30487B, Page 188 > A21 VREF+: AVDD-2.5V to AVDD + 0.3V > A22 VREF-: AVSS-0.3V to VREF+ - 2.0V > A25 VAIN: VSS-0.3V to VREF + 0.3V > > So it may work but it is not recommended. And > even it seems to work, it is still not a very > good practice. Why not get the input signal right > and feed it to the ADC? > > We have similar problem with comparators before. > The comparators of PIC are not rail to rail. So > we need to get the input signal right before > feeding it to the comparators. > > > Regards, > Xiaofan > > -----Original Message----- > From: Wouter van Ooijen > Sent: Tuesday, October 04, 2005 1:22 AM > To: 'Microcontroller discussion list - Public.' > Subject: RE: [PIC] Re: : stupid mistakes > > > > If you are not mistaken then is an interesting PIC AD behaviour. > > Probably something is changed since the first PICs on 16F series.What > > PIC are you using ? > > 16F88 > > > The standard 16F version neeed at least 2...2.2V margin between Vref- > > and Vref+ if supplied at 5V. At 1V margin as you have, resolution was > > very poor. > > What was the behaviour you observed? Missing values? Right. So I'm not wrong. There are more than 6-7 bits ? Chen, 2V margin is only on datasheet. On crude world must be *more* than 2V. cheers, Vasile -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist