Do you not want to make one ? Would be fairly simple. An 18F452 would be ideal. It has the UART, TMR1 for time- tamping (could be relative or TOD) and enough I/O to directly address a big SRAM without driver ICs (eg 4040), with the addition of a selector (eg 74138) memory can be increased by paralleling. Sessions would be made identifiable quite easily with a generated file-name -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist