>Ooohhh... that sucks.  I was really really trying to optimize the "system" so 
>that I don't overrun the min write cycles spec, and have just barely been 
>able to do so.  Refreshes would put me over that amount.  This also brings up 
>haunting memories of "CAS before RAS" dram refreshing.  <Shudder>.
>
>Do you know the Microchip document that talks about this?  I'm searching their 
>site now but not coming up with anything relevant.  I'd also like to know is 
>how periodic is periodic.  
>
>  
>
Sometime ago there was a discussion, and also a reaction from mc,
I wrote the most interesting parts down here:

   http://oase.uci.kun.nl/~mientki/pic/libs_hw/eeprom_problems.html

Stef Mientki

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