Michael Rigby-Jones wrote:

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>>-----Original Message-----
>>From: piclist-bounces@mit.edu [mailto:piclist-bounces@mit.edu] 
>>Sent: 01 September 2005 13:42
>>To: pic microcontroller discussion list
>>Subject: [PIC]: what does bit SSPSTAT<7> do ?
>>
>>
>>hello,
>>
>>as my previous post didn't get any responses,
>>I rephrase my question:
>>
>>Can anyone tell me what  bit  SSPSTAT<7> does,
>>in I2C mode  ?
>>    
>>
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>>From the mid-range reference manual:
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>"The SMP bit is the slew rate control enabled bit. This bit is in the SSPSTAT register, and controls the slew rate of the I/O pins when in I2C mode (master or slave)."
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thanks, 
but how does it control the slew-rate:
PIC16F877 manual states
 0 = slew rate control enabled for high speed mode (400 kHz)
 1 = slew rate contral disabled for standard speed mode (100 kHz and 1 MHz)

what is enabling of slew rate ???

I guess they mean something like this:
  0 = smitt-trigger input enabled (for any frequency you like)
  1 = smitt-trigger input disabled (for any frequency you like)
and above it doesn't do anything with the slew rate of the output.

Is this correct ??

Stef Mientki

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