>>Motor Brake ...

> Just a silly thought - could you implement the motor brake by adding 
> only 2 extra PNP transistors?  Collectors grounded on both, bases go 
> to nodes D1 & D2 on the schematic, emitters to matching motor leads 
> (D1:M1, D2:M2).  Both transistors are ON when both inputs are LOW, 
> the transistor connected to a motor terminal is turned OFF when that 
> terminal is brought to Vbatt.

It's a starter for 10 points, but the detail looks like it will make 
it end up no better than the existing scheme.

- The motor needs a current path on both sides so a PNP on one side 
alone isn't enough. Diodes appear ... .

- In the brake mode the transistor is turned on leading to the drear 
quiescent current - and quite significant due to the current to be 
shunted initially, were it not for the fact that ...

- The bridge is depowered by the top transistors being off so once 
motor energy vanishes the PNPs turn off.  This may be OK but mat not - 
depends on slowing motor characteristics at low voltage. Some brakes 
have allowed the motor to slow rapidly and then coast slowly.

The currently used FETs have the advantage of being actively turned 
hard on for as long as needed and drawing essentially no power in 
standby mode, even though still on.



        RM 

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