In SX Microcontrollers, SX/B Compiler and SX-Key Tool, peterverkaik wrote:

Kevin,

You have to consider memory use first.

A I2C master running as Virtual Peripheral (to 'simultaneously' service the I2C buses)

requires 8 bytes, so for 8 buses that is 64 bytes or 4 ram banks.

Some buffering is necessary, assuming 4 bytes per bus, that is another 2 ram banks.

That leaves 2 ram banks for the serial port and command dispatcher. So it seems

to fit.

Using threads to run the virtual peripheral is a must here. If you have 4 threads,

during each interrupt only the Uart tx VP routine, Uart rx VP routine, and 2 I2C master VP

needs to be executed. That is doable also.

The command format you use, must allow you to select the I2C bus that you want to access.

Basically you need 3 commands:

B selects bus, B is followed by 0 to 7, eg. B 3

W writes data to chip on selected bus, eg. W F4 addr data (access LM4970 pin adr to GND)

R reads data from chip on selected bus, eg. R F6 addr (access LM4970 pin adr to 5V)

 

This is not a project you program overnight. You must do it in assembly (due to the VP routines

and memory use). But it can be done. You might consider to do it in SX/B because that has builtin

commands for I2C master. But then the buses are serviced sequentially and I am not sure wether

that gives you enough memory.

 

regards peter

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