In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Peter Van der Zee wrote:

Hi Keith;
 

I put in a 128 byte circular fifo for you; all of the non-global ram.

 

The data is written to the buffer in the ISR, and overflow limit checking is not performed.

 

The mainline sequentially reads the fifo contents until empty, all under handshaking from the PC as per your logic.

 

I also added a VERY useful debug concept that I call ShowBreak. TRY IT!!

 

It simply is a retp instruction that you call from wherever you want a break to occur.

Just call the "ShowBreak", and set the real single debug break at THAT retp instruction. Effecively this permits you to "sprinkle" your code with as many breaks as you like, with the register contents displayed whenever the ShowBreak call is encounterd. A REAL good debug tool, of course still not in real-time.

 

I still have my previous port bit assignments.

 

Hope all works well.

 

Cheers,

 

Peter (pjv)

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