>> Doesn't "nanowatt" mean that the chip has a set of features aimed at >> low power operation > > Well... > > http://www.microchip.com/stellent/groups/designcenter_sg/documents/ > designcenter/en500064.pdf "What is nanoWatt echnology" nanoWatt Technology entails four key elements: (a) the PMOS Electrical Erasable Cell (PEEC) (b) new circuit design techniques (c) enhanced manufacturing techniques (d) optimal field support There's a lot of ad-speak in that pdf, but, y'know, good on them, it's all about market share. Anyone discerning enough would be looking past that anyway. I wouldn't say (d) has anything to do with making a chip perform better. (c) "New circuit design techniques that are unique to nanoWatt Technology include brown-out and low voltage detect" - not exactly new is it ? But, look, I don't want to get in anyone's face. A selectable clock and improved fabrication patently is a good way to reduce power. MC just happen to have chosen a name that doesn't quite fit IMVHO -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist