>-----Original Message-----
>From: piclist-bounces@mit.edu [mailto:piclist-bounces@mit.edu] 
>Sent: 09 June 2005 01:20
>To: Microcontroller discussion list - Public.
>Subject: Re: [PIC] Automotive analog signal conditioning
>
>
>> Not silly:  that information isn't there because the assumption is
>
>It certainly seems as though it is something that you know. I 
>had an inkling but needed confirmation (which I got in barrow loads)
>
>> 1.  Vref+ and Vref- have minimum and maximum allowable voltages.  
>> Those voltages are related to the Vdd of the chip, and are 
>outlined in 
>> the datatsheet.
>
>I found this in the midrange book Vref+ <= AVdd +0.3v not a 
>problem as Vdd is 5v and my current selection gives a Vref+ of 
>about 1.85-1.9v depending on other load (and probably the 
>noise) I have Vref- >= AVss-0.3v not a problem because it is 
>coupled to Vss, I would use a mode that only required one 
>reference, but it's not possible without a (albeit simple) 
>redesign and etch. What bothers me are the lines below it that 
>says the minimum difference should be 0v to avoid latch up, or 
>3v for 10bit resolution. I am using left justified data (for 8 bit
>resolution) will this affect me? I really like the resistor 
>selection I have right now as the 8 buttons are giving ~10% 
>separation. If I go to 3v then I will have ~7% separation.


Don't use the mid range reference manual for detailed electrical specs.  Depending on the process used in the PIC you have, these details can change, you should always use the datasheet for these values.

Also, you have looked at the maximum voltage on Vref+, but you haven't checked the minimum voltage which is rather more important for your application.  This is typicaly AVdd-2.5v so you would be out of spec with a 5volt supply.

Thirdly, you should be able to get a fixed separation between the buttons irrespective of the reference voltage, by selcting suitable resistors.

Regards

Mike

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