On Fri, 2005-06-03 at 14:09 +0100, Michael Rigby-Jones wrote:

> >Even these high speed links are length matched.  We
> >are in a design with SATA and PCI-E, and all those
> >still have the length matching issues.
> >
> 
> Even more critical as the data rates are very high.  However, it's much easier to achieve as there are far fewer high speed lines than a parallel bus.

Not always. Consider a 16X PCIE connector, it has 32 wires in each
direction, meaning those 32 wires have to be pretty closely length
matched, for each direction. 

32X PCIE connectors are as bad as DDR and PCI in number of wires to
route, just much higher frequencies (although 32X connectors haven't
appeared yet it is in the spec). This will only get worse with PCIE Gen
2.0 which will be likely running at 5GHz.

TTYL

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