olin_piclist@embedinc.com (Olin Lathrop) wrote: > Peter wrote: > > I love that kind of noise. vss connected to gnd is a failure to rename > > pins and/or nets suitably imho. > > Not really. It only means that you have a supply and a power pin on the > same net that have different names. This can happen easily, and should be > none of Eagle's business. [snip] > The right answer is for Eagle to be less uppity. This kind of nonsense > makes the ERC less useful than it could be. As a result, I usually run it > just once before starting layout. Indeed. The whole concept of a "power" pin type in the library editors of most schematic capture packages is seriously flawed, usually in a way similar to this. My solution has been to define power pins as ordinary "input" pins in my libraries. This shuts up the ERC chatter, and allows me to do unusual things when I need to, like switch the power to a particular part through a transistor. -- Dave Tweed -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist