Paul van der Linden wrote: > Ok, thank you. But how to make sure that the external circuit can > tolerate it? How do I seperate it while programming? That is of course dependent on your circuit. On PICs with many pins, it can be as simple as dedicating PGC and PGD to the programming function and tying MCLR to Vdd via 20Kohms or so. On the other hand, this can be a serious challenge on small PICs like the 10F series. When a PIC only has 6 pins and 5 of them are required for programming, programming becomes a serious issue when designing the circuit. We recently had a problem with in-circuit programming a 10F202. The PGD line was connected to a CMOS input of another chip, so we thought that would be OK. It turns out that this chip had a nasty undocumented feature where that input is pulled to ground when the chip enable is de-asserted. Unfortunately the chip enable was tied to PGC, so these needed to be wiggled independently. Fortunately in this case we can tolerate sufficient series resistance between the 10F PGD and the other chip during normal operation for the programmer to be able to drive the PGD line as needed, but we still need to do another layout. Oh well, that's why you build prototype units. ***************************************************************** Embed Inc, embedded system specialists in Littleton Massachusetts (978) 742-9014, http://www.embedinc.com -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist