>I define the pseudo ground plane
 >in Eagle as a polygon, and set the cost for routing in that layer very=20
high.

How is this done exactly? I have never understood how a top layer with=20
lots of copper ground plane around a few traces are done in eagle.

/Ake

Olin Lathrop wrote:

>Denny Esterline wrote:
> =20
>
>>>Peculiar, not sure if it's just me or if others see it too, but my
>>>last post returned to me as an attachment... Hmm, let's try again.
>>>     =20
>>>
>
>I got an empty message from you, so it probably did have the text as an
>attachment.  This time the message came thru fine, but when I did a repl=
y I
>got two levels of quoting (>>) as you can see above instead of one.
>Strange.
>
> =20
>
>>>Personally I don't like the look of traces at random angles, and it
>>>can lead to uncertainties for high frequency work.
>>>     =20
>>>
>
>The electrons don't care.  For high frequency work the straightest and
>shortest paths are best.  These are often not at nice axis aligned angle=
s.
>
> =20
>
>>>Given a similar problem, This is what I might have created:
>>>
>>>(red=3Dtop, blue=3Dbottom) I'm sure I don't have the same libraries as
>>>you, but I think you'll get the general idea. Notice the power and
>>>ground traces are heavier, and shorter where practical.
>>>     =20
>>>
>
>For a two layer thru hole board, I would have set up the bottom layer as=
 the
>primary interconnect, and the top layer as a pseudo ground plane.  It
>wouldn't be a real ground plane since some traces will likely need to be
>routed there, but the intent would be to make those traces short and
>isolated.  Small islands in a ground plane don't matter much.  Just be
>careful that a bunch of small traces don't clump together to make a big =
hole
>in the ground plane.
>
>I have a standard setup for such boards.  I define the pseudo ground pla=
ne
>in Eagle as a polygon, and set the cost for routing in that layer very h=
igh.
>Initially the cost will be low to guarantee a solution, but this is cran=
ked
>up early in the optimize passes.  After 8 optimize passes you usually ge=
t a
>nice board.  Your board isn't very complex, and I expect this technique
>would work very well on it.
>
> =20
>
>>>I also notice there's a few things I would probably add. Mounting
>>>holes?
>>>     =20
>>>
>
>Or areas in the corners for rubber feet.  For lots of prototype boards I
>never intend to put them into a case, just stick rubber feet in each of =
the
>corners.
>
>Another few niceties I like to add:
>
>1 - Put the customer-visible name of the product on the silkscreen, comp=
any
>name, and the date.  For example, the current production version of the
>ProProg has:
>
>  Embed Inc
>  ProProg
>  Version 2
>  2 Aug 2004
>
>in the lower left corner.  If you're making boards for yourself, similar
>information is still useful.  Three years and 2 revs later it won't be a=
s
>obvious as you think to remember which board is which.
>
>2 - Internal name or part number on the top copper along the edge somewh=
ere.
>This is the same name I use for the project name in Eagle and that all t=
he
>files for this project start with.  For example the ProProg has "PPRG2" =
in
>copper near the lower middle.
>
>3 - Take the trouble to clean up the silkscreen after placement and rout=
ing.
>Part designators at all angles, under parts, and over vias is a pain to =
use
>later and makes it look amateurish.  Yes, this takes a little work, but
>doing it right usually does.
>
>
>*****************************************************************
>Embed Inc, embedded system specialists in Littleton Massachusetts
>(978) 742-9014, http://www.embedinc.com
> =20
>


--=20
 ---
Ake Hedman (YAP - Yet Another Programmer)
eurosource, Brattbergav=E4gen 17, 820 50 LOS, Sweden
Phone: (46) 657 413430 Cellular: (46) 73 84 84 102
Company home: http://www.eurosource.se     =20
Kryddor/Te/Kaffe: http://www.brattberg.com
Personal homepage: http://www.eurosource.se/akhe
Automated home: http://www.vscp.org


--=20
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