At 04:02 PM 5/3/2005 -0700, you wrote: >My confusion comes in as follows: I'm trying to use the internal RC osc > >( _INTRC_OSC_NOCLKOUT ) which I believe ends up at 1 us > >execution cycles. To achieve a 38KHz flash rate I need an interrupt every > >26.3 us. 13.15usec per half cycle. I don't think you have enough time to save and restore context and reload timer0 at 4MHz, let alone keep track of other timing. If you run the PIC from a 10/20MHz resonator you'll get a more accurate signal (because a typical resonator is +/-0.5% guaranteed) and you'll get a resolution of 200ns (and, crucially, a lot more cycles to play with for each interrupt). If you use 33/66 cycles for each half-cycle, the error will be -.3% (not counting oscillator error), which doesn't sound too bad. At 4MHz, you should be able to get it to work by writing it as an isochronous loop rather than using interrupts, but it will severely limit what else you can get the PIC to do at the same time, and how you have to do it. Best regards, Spehro Pefhany --"it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist