> > Twc = 5ms is for byte or page > > at 1 byte received per 600uS, you would receive 16 bytes in: > 16 x 600uS = 9.6mS which leaves you about 4.6mS to verify the > last write, setup the next 16 to write and 5mS (max) for writing a > page. The scheme suggested by Olin would be workable. Two page-sized buffers, alternately collecting/writing. To shift the whole 16 bytes in one 600us IRQ would mean running the I2C at 400kHz, or at least well over 100kHz, haven't done the maths. Although whatever the transfer speed to the EEPROM's buffer, it takes longer to collect 16 bytes than to write them. If there's any kind of write/verify failure the s/w should have time to find and correct that in the next available IRQ period(s) -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist