>>last bit of byte shifted out - set interrupt flag >>PIC tries to load next byte - master not yet ack'd previous >>byte so collision. > >The SSPIF flag is set on the falling edge of the ACKnowledge clock bit, >so you *shouldn't* ever get into the ISR before the entire byte has been >sent and acknowledged. OK, I was just surmising there, but obviously there is some race condition that causes something like this to happen. I just went and had a pretty close look at the datasheet (rev C is what I have) and apart from the register description right at the beginning of the section on the MSSP, there is absolutely no discussion of the WCOL flag within the slave portion of the datasheet. It gets plenty of mention in the master section though. -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist