Wouter van Ooijen <wouter@voti.nl> wrote:
>The Q7 changes state on the edge of the input clock. If the Q7 is fed to
>a subsequent 595 and that chip receives a slightly delayed clock edge it
>might clock in the new data value, instead of the old one.

I seem to recall that, the last time this was discussed, someone made
the clever suggestion that the serial clock is distributed to the chain
of '595s in *reverse* order (i.e. starting with the one at the end of
the chain and working backwards).  The difference in propagation time
then works in favour of each '595 clocking in the old data value.

I'm not sure who to credit for that idea, though.
-- 
Ian Chapman
Chapmip Technology, UK
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