>
>In the case of smaller PICs, such as the 16f628, Vdd and Vss are at
>opposite ends of the chip - symmetrically, right across from each other.
>
>Would it make sense to put the cap hidden inside a chip socket (if a
>socket is used in the design) with one lead to Vss and the other to Vdd?
>
>I think that configuration would give you the shortest trace possible.

You do, but even then, you can get better.

What you want, is for VCC to go to the cap, and then to the chip.
You don't want VCC to go across the top of a circuit that is the cap, plus 
lead inductance.

Imagine a "T" where VCC enters on the left, and the chip connects on the right.
The cap is at the bottom. This puts almost all the lead inductance in place 
making the bypass cap less effective.
  The ideal connection is a "V" where you force ALL the current to pass the 
cap.
Now the lead inductances form a "tee filter" and actually help you.

Panasonic and others, make three leaded ceramic caps, and SMD caps with 
three and four leads, for this purpose.
The connection is actually made inside the cap.

If the PCB ground layout supports it, these can give you large reductions 
in EMI.



-- 
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist