On Fri, Mar 04, 2005 at 11:00:12AM +1300, Russell McMahon wrote: > In all cases, keep capacitor lead lengths as short as possible and > mount capacitors as near IC power pins as possible. In critical > applications use one capacitor per IC. In the case of smaller PICs, such as the 16f628, Vdd and Vss are at opposite ends of the chip - symmetrically, right across from each other. Would it make sense to put the cap hidden inside a chip socket (if a socket is used in the design) with one lead to Vss and the other to Vdd? I think that configuration would give you the shortest trace possible. Although perhaps that is not considered good engineering practice as components are now hidden and possibly harder to debug when troubles arise. -v -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist