On Feb 3, 2005, at 9:25 AM, Bob Axtell wrote:

> from [start bit] on through the  frame until the end of the STOP bit,
> timing is precise. The receiver UART locks on at the beginning of the
> START bit and subjects the remaining bits to a rigid timing test until
> the end of the  STOP bit, then the UART is released from its rigid 
> timing.

Presumably the "problem" is with software uarts that check the full stop
bit, and don't have time to "unsynchronize" before the next start-bit 
starts.

BillW
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