LIST P=16F877A, R=DEC
	#include "P16F877A.INC"
	__config _HS_OSC & _LVP_OFF & _WDT_OFF & _PWRTE_ON & _BODEN_ON
		ORG	0							; start code - this is where cpu starts on reset
		goto	main					; goto main routine
	   	cblock  0x20					; this is where the RAM starts in 16F628
                temp                    ; Temoporary buffer
				counta					; counter
				countb					; counter
				count1					; counter
		endc							; we are done defining the RAM allocations
main		bsf     STATUS,RP0              ; We need to switch to RAM bank 1 (set
STATUS,RP0)
        	movlw   b'00010000'             ; Set PORTA inputs and outputs
        	movwf   PORTB					; This is really TRISA - it just maps as PORTA -
with a bank swap
        	movlw   b'00000111'             ; Set PORTB inputs and outputs
        	movwf   PORTC					; This is really TRISB - it just maps as PORTB -
with a bank swap
	    	movlw	b'00000000'				; set port D as all outputs
		movwf	PORTD					; This is really TRISD - it just maps as PORTB - with a
bank swap
		movlw   b'11010000'             ; INTF hi/lo, TMR0/2
		movwf   TMR0					; This is really OPTION_REG - it just maps as TMR0 - with
a bank swap
	    	movlw   b'00100010'             ; USART RX interrupt ON bit 5 76X43210
        	movwf   PIR1                    ; This is really PIE1 - it just
maps as PIR1 - with a bank swap
	    	movlw	b'00000000'				; A/D right justified data bit [7], A/D clock
rate bit [6]
		movwf   ADCON0          		; commit A/D settings
	      movlw   d'128'					; 4K8 data speed @ 10MHz xtal freq (9600 is d'64')
        	movwf   TXREG                   ; This is really SPBRG_REG - it
just maps as TXREG - with a bank swap
	    	bcf     STATUS,RP0              ; back to RAM page 0
        	clrf    PIR1                    ; Reset PERIF interrupt bit
        	movlw   b'01000000'             ; PIE1 and RB0 interrupt on
		movwf	INTCON					; set the bits in the INTCON
        	movlw   b'00000001'				; load 00000001
        	movwf   T1CON                   ; TMR1 /1, on
		movlw	b'00000000'				; load 00000000
		movwf	T2CON					; TMR2 /1, off
  		movlw   b'00000001'     		; A/D FOsc/2 bit [7-6], A/D Ch0 bits [5-3],
A/D turn on bit [0]
        	movwf   ADCON0					; commit A/D settings

sample

start 	bsf     ADCON0,GO       		; start A/D conversion
wait		btfsc   ADCON0,GO       		; wait for conversion to complete
        	goto    wait					; if A/D not ready just loop

		movf	ADRESH,W				; high 8 bits of results
		call	send
		movf	ADRESL,W				; low 8 bits of results
		call	send

		goto	start

send		movwf	TXREG					; send the data
		bsf	STATUS,RP0				; swap to bank 1
send2		btfss	RCSTA,TRMT				; test to see if char tx
		goto 	send2					; loop until character away
		bcf 	STATUS,RP0				; set the bank back again
		return 					; return to where sub was called

Delay255
		movlw	0xff					;delay 255 ms (4 MHz clock)
		goto	d0
Delay100
		movlw	d'100'					;delay 100ms (4 MHz clock)
		goto	d0
Delay50	movlw	d'50'					;delay 50ms (4 MHz clock)
		goto	d0
Delay20	movlw	d'20'					;delay 20ms (4 MHz clock)
		goto	d0
Delay1	movlw	d'1'
		goto	d0
Delay5	movlw	0x05					;delay 5.000 ms (4 MHz clock)
d0		movwf	count1
d1		movlw	0xC7					;delay 1ms (4 MHz clock)
		movwf	counta
		movlw	0x01
		movwf	countb
Delay_0	decfsz	counta, f
		goto	$+2
		decfsz	countb, f
		goto	Delay_0
		decfsz	count1	,f
		goto	d1
		return
longdelay								; this is the long delay 1 second (4 MHz clock)
		call	Delay255				; delay
		call	Delay255				; delay
		call	Delay255				; delay
		call	Delay255				; delay
		return							; return to where sub was called
		end								; end of file

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