Scott Dattalo <piclist@mit.edu> wrote:

> If GPIO 0 and GPIO1 are the inputs then 4 cycles can be saved:
> 
>    org  at an address at least 15 words from a page boundary.
> 
>      clrf   PCLATH
>      goto   read_port
> loop:
>      MOVWF  GPIO
> read_port:
>      RLF    GPIO,W
>      ANDLW  0b00000110
>      ADDWF  PCL,F
>      MOVLW  0b00000001
>      GOTO   LOOP
>      MOVLW  0b00000010
>      GOTO   LOOP
>      MOVLW  0b00000100
>      GOTO   LOOP
>      MOVLW  0b00001000
>      GOTO   LOOP
> 
> 8 cycles per loop iteration.

    You probably meant to have those "1" outputs on bits 2, 3, 4,
    and 5 rather than 0, 1, 2, and 3. 

    If you don't mind having 16 copies of the four MOVLW/GOTO pairs
    (and if you clear the carry after clearing PCLATH), you can
    remove the ANDLW and make it 7 cycles per iteration... 

    -Andy

=== Andrew Warren -- aiw@cypress.com
=== Principal Design Engineer
=== Cypress Semiconductor Corporation
=== 
=== Opinions expressed above do not
=== necessarily represent those of
=== Cypress Semiconductor Corporation

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