> And if the interrupt is async (external event), it takes an
> additional 1-2 cycles (giving the total of 3-4 cycles the
> data sheet talks about) to do exactly the same.

It is important to understand that the number of cycles 'stolen' from normal 
execution is no more for an external interrupt than it is for an internal 
one. It is just the the start of the processing of the external interrupt is 
delayed for one or two instruction cycles to syncronize it with the internal 
processing of the PIC.

In other words, a syncronizing circuit turns the asynchronous (external) 
interrupt into a synchronous signal, and it is the delay in that latch that 
adds to the latency for external interrupts.

Bob Ammerman
RAm Systems


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