Bob Ammerman wrote :

> I believe that taking an interrupt is only two instruction 
> cycles on PICs.  It is effectively a forced 'call' instruction.

It depends on the source of the interrupt.
>From the 18F252 data sheet (page 73) :

"...For external interrupt events, such as the INT pins or
the POSRTB input change interrupt, the interrupt latency
will be three or four instruction cycles. ..."

Regards,
Jan-Erik.
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