On Sunday 12 September 2004 07:06 pm, Scott Fraser wrote:
> I'm using timer1 to divide the instruction clock and keep time.  The
> problem that I am having is that I cannot seem to get 16 bit resolution
> out of the counter.
>
> I set up the TMR1H and TMR1L to count clock cycles and to roll over after
> 100mS.
>
> I was close and wanted to adjust the value and found that I was unable to
> get the resolution that 16 bits should provide.
>
> Clock = 4MHz
> Fosc/4 = 1MHz
> Prescale = 1:8
> T1CON = %00110001
>
> I calculate that I should have 8uS per count with this setup.
> 65536 counts will give an timer overflow at 0.524288 seconds.
> I set up TMR1H and TMR1L with 0, 0 and that was the time that it took to
> fill the counter.  So far so good.
>
> I then programmed the registers with
> TMR1H = 207, TMR1L = 44 (16 bit: 53036) , the overflow occurred at
> 102.4mS   (2.4ms too long)  I figured, OK I know I have to account for
> instruction time in resetting the timers, but 2.4mS?  That's approx. 2400
> instructions, so something else is going on here.

Haven't used Timer1 yet, but T1CON should probably have T1SYNC=1

Before going further, I figure 207 & 44 also.

You may want to verify your crystal is indeed running at the correct 
frequency because perhaps it isn't.
Therefore suggest making a simple loop counter which does not involve timer 
to verify crystal speed. Something approximately like:

;wait 100msec = 100,000cycles
	movlw	130
	movwf	count
	movlw	222
	movwf	count+1
lp	decfsz	count+1,f
	goto	lp
	decfsz	count,f
	goto	lp
(code above typed without verifying spelling or values, but close enough to 
give idea of what's meant as 100msec)
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