On Tue, 24 Aug 2004 14:20:19 +0100, Nigel Orr
<nigel@AXONINSTRUMENTS.CO.UK> wrote:

> A serial byte is about 10 bits long (including start bits etc), and is
> usually sampled at the receiving end in the middle of each bit.
> Therefore,
> if the timing slips by more than 1/2 bit width during 10 bits, there will
> be errors.  That's an error of 0.5/10 or 5%.  If you assume that is
> shared
> across both transmitter and receiver, they are allowed 2.5% each, but it
> would be better to keep it under 1%.  The 628A internal clock (IIRC) is
> about 3-4%

Over 0-85 degrees, the max jitter is 2%.

>
> The real life answer comes about because:
> 1) when I have used them for this purpose, I haven't needed them to be
> functional over a wide temperature or supply voltage range,
> 2) the typical accuracy is better than the worst case quoted in the
> datasheet
> 3) I don't usually have a PIC at each end, the PC end is probably a
> crystal, with accuracy better than 0.1% so the PIC can get away with a
> larger clock error
>
> If you can test each part across the full expected range, and afford to
> throw away some PICs, it might be worth a risk for a small controlled
> production run, but that's what you have to figure out- I wouldn't try it
> personally!

We're talking about at most 10 units, which will all be used at standard
office temperatures.  The data source is an inclinometer, whose circuit
details I'm not privy to.  The actual unit generates one of 16 contact
closures based on the radius and angle of the tilt sensor.  It's a
redesign of a bunch (too many) of one-offs I did with a Basic Stamp II
(it's essentially a joystick controlled by an individual balancing on a
board).  The inclinometer generates a continuous data stream, which is
read when convenient; occasional misreadings won't cause critical problems.

> As someone else has mentioned, the baud rate is irrelevant, the above
> problem is just as bad at 300 baud and 19200 baud

Well, there's also the relationship of the clock to the divisor to take
into account; at the nominal clock (4MHZ) truncating the divisor to an
integer introduces only a 0.16% error at 9600, but at other rates it could
be more.

It looks like if I go with the internal oscillator, the rate will range
 from 9423 (-1.8%) to 9808 (+2.2%) with a nominal of 9615 (+0.16%).  The
CPU will be a socketed DIP, so I can swap parts if necessary.

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