SUMMARY    Anyone have thoughts on brownout protection for low pin count
processors where reset line is not available?


I note that several of the reduced pin count processors have onboard Reset
BUT do not have anti-brownout circuitry. I am surprised at this (stupid?)
omission in a modern processor, especially so when the reset pin will
usually not be available due to the need to utilise every available pin as
I/O

Both Attiny11 (6 I/O) and the PIC10Fxxx (4 I/O) suffer from this defect.
If one does not feel lead to use prayer as the primary means of brownout
protection then a hardware solution is needed.

One approach is to use the reset pin (lose 1 I/O) and use an external
brownout control chip/cct. IC versions probably exceed the cost of the
ATtiny11.

With no reset pin one can drop the whole Vdd when brownout is detected
externally to trigger POR. Running either IC from the output of an idle-high
/ active low reset generator IC would work.

A simple 1 transistor cct may suffice.
Word art should do.
PNP
emitter to Vcc
Collector to processor Vdd
resistor r1 base to Vcc
resistor R2 base to Gnd.
Cap C1 electro base to Vcc.

Base is biased to slightly on by r1/R2.
Negative spikes on Vcc drop Vcc while base is held by C1.
Transistor turns off.

A more complex form may be needed for stretching time off.

Thoughts on the whole subject?


        RM

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