A search on google would turn up the answer to this much faster than asking the list. A latch is a a piece of digital logic that will hold a value based on its enable and the incoming data. It's level sensitive and is not clocked. http://www.deeps.org/digital/questions.html http://www.vlsibank.com/sessionspage.asp?titl_id=127 http://dept-info.labri.u-bordeaux.fr/~strandh/Teaching/AMP/Common/Strandh-Tutorial/flip-flops.html Lindy Mayfield wrote: > I'm really sorry to ask such a dumb question, but this one point is heart of why I have yet to comprehend this problem: > > What is a latch, or output latch? > > > >>>What is the read-write-mod bug you speak of? >> >>What Lawrence said >> >>http://www.piclist.com/techref/readmodwrite.htm >> >>A pretty nasty real-life example that kept me occupied for a day >> >>http://home.clear.net.nz/pages/joecolquitt/sx_pins2.html >> >>(setb = bsf, clrb = bcf). Note how the problem simply >>disappears >>when NOPs or shadow regs are used >> > > > --- > Outgoing mail is certified Virus Free. > Checked by AVG anti-virus system (http://www.grisoft.com). > Version: 6.0.699 / Virus Database: 456 - Release Date: 6/4/2004 > > > -- > http://www.piclist.com#nomail Going offline? Don't AutoReply us! > email listserv@mitvma.mit.edu with SET PICList DIGEST in the body -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email listserv@mitvma.mit.edu with SET PICList DIGEST in the body