>-----Original Message----- >From: Byron A Jeff [mailto:byron@CC.GATECH.EDU] >Sent: 15 June 2004 17:02 >To: PICLIST@MITVMA.MIT.EDU >Subject: Re: [PIC] PIC18F452 LVP pin needs to be tied low? > > >Um, does a Begin Erase command not apply to the configuration >memory? Nothing in the 16F88 progspec indicates that you >cannot erase the config memory area, just that the CP bit >cannot be erased. But it's unclear if the LVP bit can be >erased at 3.3V Vdd but a normal 13V Vpp. If so you're still in >the same boat. > >Clarity preserved. ;-) Well, I was really talking from the 18F452 perspective, in which case the configuration word requires a bulk erase to be re-programmed. Learnt this from bitter experience of lots of units that have PICs with a bunch of 3.3v only components on the same rail. I'm not overly familiar with the 16F88, but I wouldn't be surprised if this was the case. Regards Mike ======================================================================= This e-mail is intended for the person it is addressed to only. The information contained in it may be confidential and/or protected by law. If you are not the intended recipient of this message, you must not make any use of this information, or copy or show it to any person. Please contact us immediately to tell us that you have received this e-mail, and return the original to us. Any use, forwarding, printing or copying of this message is strictly prohibited. No part of this message can be considered a request for goods or services. ======================================================================= Any questions about Bookham's E-Mail service should be directed to postmaster@bookham.com. -- http://www.piclist.com hint: The list server can filter out subtopics (like ads or off topics) for you. See http://www.piclist.com/#topics