RISC doesn't have to do with Memory, it only has to do with the instruction set. It's characterized, more or less by the simplicity of the instructions. Typical Cisc instructions will have 2 to 3 operands, whereas a RISC will have one operand. Another major component is the use of registers and the focus on hardware simplicity. http://cse.stanford.edu/class/sophomore-college/projects-00/risc/whatis/index.html Shawn Wilton Junior in CpE MicroBiologist Phone: (503) 881-2707 Email: shawn@black9.net http://black9.net William Chops Westfield wrote: > On Thursday, Apr 15, 2004, at 12:31 US/Pacific, Shawn Wilton wrote: > >>> I've been wondering the same thing. Except, I'd also ask about the >>> Zilog chips? Like the eZ80? How do the Atmel, Microchip, and Zilog >>> chips compare? > > >> Honestly, they're all vastly different. They're all RISC, but that's >> about where the comparison stops. >> > The EZ80 is a Z80 architecture, which I don't think anyone has been > calling RISC. I don't really consider the Z8 or PICs to be RISC > systems either (the architectures predate the seminal RISC work, after > all, and they're lacking some of what I consider the important > concepts, like, say, memory, or "architected for compiler writers".) > They're not CISC either, really. They're just controllers with rather > limited instruction sets. (LISC. Not a bad concept as a new name, > perhaps.) > LISC machines have some of the nice features of RISC (like a HW > complexity level conducive to high clock speeds), but calling them RISC > machines is just marketing hoopla... > > BillW > > -- > http://www.piclist.com hint: To leave the PICList > mailto:piclist-unsubscribe-request@mitvma.mit.edu -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu