Yeah, and have you seen those TI/BB psuedo spi ADCs (ADS1253, 1251 and others)?? They multiplex SDO with a signal line and there is no CS, so the SCK and SDO lines on the adc never get tristated. Nothing a few logic gates can't take care of, but... I would rather have two more pins on the package than have to add 2 14-pin logic IC's to interface the ADC to my spi bus. Oh well, I don't believe they ever claimed spi compatibility, they just used a 'similar' interface. Eric On Wed, 14 Apr 2004 15:55:39 -0400 Spehro Pefhany wrote: > At 12:19 PM 4/14/2004 -0700, you wrote: > >I personally don't think the device with common SDI/SDO line be called > >"SPI-Compatiable". > >Thomas > >Rick Regan wrote: > > > > > >So the device (with the common SDI/SDO line) must be > >accessed "half duplex", as opposed to SPI, which clocks > >data in/out on the same pulse? Is this really SPI then? > > There are often surprises when SPI is involved- consider the designer > I took over from who wired up the SDO on a Burr-Brown DAC to the > SDI on a PIC18F8520. Unfortunately, for him, the SDO on that > part was intended for daisy-chaining only, and was therefore not > tristated when the /CS was released. Time for Mr. Trace to meet > Mr. X-acto (or Ms. Dremel). > > Best regards, > > Spehro Pefhany --"it's the network..." "The Journey is the > reward" speff@interlog.com Info for manufacturers: > http://www.trexon.com > Embedded software/hardware/analog Info for designers: http://www.speff.com > > -- > http://www.piclist.com#nomail Going offline? Don't AutoReply us! > email listserv@mitvma.mit.edu with SET PICList DIGEST in the body -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email listserv@mitvma.mit.edu with SET PICList DIGEST in the body