First, I'll echo Jan-Erik's "Which PIC?" query.

>So that sets the directions just fine
>banksel PORTA
>movlw b'00010100'     ; 0x14
>movwf PORTA

So you're setting RA.4, then.  RA.4 is an open-drain output
(on many PICs, but maybe not all.  I just checked the 1st
datasheet I found, which was the 18F458, and verified that
for that processor at least, this is the case, and for most
others, IIRC).  Checking PORTA would be RMW, so if you
read PORTA and nothing is pulling RA.4 high, it'll read as '0'.

This is why the LAT registers are present on the 18xxx PICs.
Try it with a pull-up on RA.4 (say 1k-10k) and see what
happens.

>I come back after a single step and it returns to a 0x04
>
>And yes, confirmed on the hardware that the bit isnt being set

One last thing: have you confirmed with the errata sheets
that MPLAB or the particular silicon revision of the PIC you
have do not have a glitch causing this?

Mike H.

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