In my experience, the chip knows chip select which in turn yields the first bit, which in turn yields the last bit. The application does not depend on -CS. -----Original Message----- From: Harold Hallikainen [mailto:harold@HALLIKAINEN.COM] Sent: Wednesday, March 17, 2004 12:41 PM To: PICLIST@MITVMA.MIT.EDU Subject: Re: [ee]: Multiple SPI slaves *without* chip select lines? As other people have pointed out, a shift register ignores data until a clock comes along. But, not knowing these parts, I still don't understand how the device knows where the end of a byte or word is. A typical SPI device clocks data through a serial in parallel out shift register, then captures the data in a parallel latch on the trailing edge of -CS. Without that, it seems that you'd never know where to latch the data. Harold > Agilent optical mouse sensors. They use something that can be thought of > as > SPI if you tie the Data In and Data Out lines together (only the sensor > *or* the microprocessor is speaking at a time and this is ridgedly > controlled) without a slave select. > > You *can* have SPI without a slave select, you can only have one slave. > > These changes are why I called it "spi-like". -- FCC Rules Online at http://www.hallikainen.com -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads