> Master transmits on mosi.  You have multiple slaves.  The master sends a bit and receives a bit from a slave on each of the 8 (or 16) clock pulses.
>
> So how do you propose to prevent more than one slave from responding to the master's clock?

> By the way, if the chips have no chip-select line (per your definition), to where do you expect to connect the multiplexer chip?

By multiplexing the clock line. The best suggestion, which I might have
thought of if my brain wasn't on strike, is to use an AND gate at each
clock input which ANDs the clock with the specific chip select.

The chip's definition says that the data line is ignored without the clock.
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