Jim Tellier wrote:

> Anthony Toft wrote:
> > A ways back there was some discussion on the use of finite state
> > machines (FSM) in designing software for the PIC.
> > I have been thinking about writing a compiler for the PIC basically
> > since I started messing with them, but there are several out there or in
> > the works...
> > So I have decided to make an FSM compiler, you define the FSM in a
> > structured language, and the resulting ASM makes the pic behave as
> > described.
> > Is there any need for this? If there is and you'd use it, what would you
> > like to see in it? What language would you like to see it modeled on (C,
> > Pascal)? How would you like it to look (file structure)? What features
> > would you like to see?
>
> I've also toyed with this idea, but never had the time to carry it out.
> Some time ago, I used a VHDL-generating tool that had FSM description as one
> of its input schemas.  (can't recall the product name at the moment, but
> it's not that important).  It provided a simple graphic capability for
> drawing "bubbles" and "arcs", attaching labels to them, etc.  You'd click
> the "OK" button, and voila--- instant VHDL module.
>  Personally, I think this is the way to do state-machine design: you *need*
> the graphic representation so you can visually relate to the functionality
> you are trying to define.  If you try to describe FSMs in some form of
> procedural "code" (C, Pascal, asm, etc), your brain has to perform the
> "mapping" (from bubbles & arcs) to code.  It's error prone and tedious
> coding, no matter what the language.
>   If you're not in a super big hurry to get this done, I might be willing to
> collaborate on such a project.   Contact me offline if you want to
> brainstorm a bit!
>   Jim
> jimtellier@cox.net

Go for it Jim! You really need to use state diagrams as a programming method for
state machines. But don't forget if this is to be a proper programming system
you will also need some kind of debug support. You will want to be able to trace
events and state transitions on the diagram - source level debug your state
machine.

Regards
Sergio Masci

http://www.xcprod.com/titan/XCSB - optimising structured PIC BASIC compiler

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