Hi, thanks for the reply. In article <5.1.1.5.2.20040314002203.045f2540@mail.interlog.com>, Spehro Pefhany wrote: > At 01:00 AM 3/14/2004 +0100, you wrote: > [...] > >So, does anyone know how discard the contents of TXREG and force it into > >the 'empty' state (where TXIF gets set etc.)? > > Perhaps a silly/obvious question, but have you tried a bsf on TXIF ? It > appears to perform the function of a flag holding the empty/full state of > TXREG. > It says it can't be *cleared* in software ("filling" TXREG), but nothing about > setting it ("emptying" TXREG). You are right, it doesn't explicitly say read-only... interesting idea, I'll have to try this. :-) > The clearing of TSR does not seem to be guaranteed according to the > documents, but maybe the hardware actually does it. Yes, it seems so. > >I've tried many things already, e.g. turning the USART off and on, but that > >doesn't do it. > > Note that turning the USART off floats the pins. Probably not an issue, > however. It was a desperate attempt, I really would prefer the receiver to stay on. Didn't help anyway. > Worst case, I suppose you could gate the output with a spare port pin.. > (ugh). It is a wire-OR bus, so tri-stating it is enough. But the timing is hairy, and I'd prefer if all this is synced to the normal transmit sequence, it makes it much easier. But I suppose the pin could be floated when the conflict is detected, allowing the transmitter to continue sending into nothing. Then, knowing that it will take longer than 2 bytes before the bus is free, the register should be empty by the time it tries again. Maybe this is the solution. Regards, Thomas -- 9876543210 Magic tab-o-meter. http://www.armware.dk/ ^ -- http://www.piclist.com hint: The PICList is archived three different ways. See http://www.piclist.com/#archives for details.