At 01:00 AM 3/14/2004 +0100, you wrote:
>Hi,
>
>I've been looking at app notes and data sheets, but I haven't found how to
>do this.
>
>Basically I've got a 16F62x which has been transmitting data with the
>USART, and has been stopped (due to a bus conflict), and then later it
>needs to try again.
>
>When this happens, it needs to somehow empty TXREG of the data from the
>previous aborted transmission. Otherwise the first byte sent will be one of
>those that it didn't get to send last time. The internal TSR is apparently
>emptied at some point, probably when TXEN is cleared, but I can't find hard
>information about this either. In practice, it is always only 1 extra byte
>lingering, and it corresponds to whatever was in TXREG when the
>transmission was aborted.
>
>So, does anyone know how discard the contents of TXREG and force it into
>the 'empty' state (where TXIF gets set etc.)?

Perhaps a silly/obvious question, but have you tried a bsf on TXIF ?  It
appears to perform the function of a flag holding the empty/full state of
TXREG.
It says it can't be *cleared* in software ("filling" TXREG), but nothing about
setting it ("emptying" TXREG).

The clearing of TSR does not seem to be guaranteed according to the
documents, but maybe the hardware actually does it.

>I've tried many things already, e.g. turning the USART off and on, but that
>doesn't do it.

Note that turning the USART off floats the pins. Probably not an issue,
however.

Worst case, I suppose you could gate the output with a spare port pin..
(ugh).

Best regards,

Spehro Pefhany --"it's the network..."            "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com

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