>Solutions :

>On *any* PIC :
>1. Use a shadow register. Or
>2. Use a delay between the two BSF's, so the external
>capacitive load have had time to charge up in between.

>On 18-series PICs :
>1 and 2 as above and
>3. Use LATx instead of PORTx for bit handling instructions.

>Note that this is a dynamic (race condition) problem.
>A prototype running at a slower speed can work just fine, but
>not when tested at a higher speed.

>Does it make any sense ?

>Jan-Erik.


I've read this thread, other threads, articles posted in various places
including piclist.com & Microchip.com and I've read and re-read the data
sheet for the 18F452.  Here's my conclusion and please tell me if it's
wrong:

If you always read from PORTx and always write to LATx, you won't get bit by
the Read-Modify-Write situation.

Right?

Carey Fisher

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