I am pulling pin 1 low.  If this pin is below the threshold, then the gate
voltage shuts off.  And that works.  However, when I release it, the voltage
on pin 1 goes above threshold, yet the gate voltage sits around 4V rather
than around 60V


>From: Spehro Pefhany <speff@INTERLOG.COM>
>Reply-To: pic microcontroller discussion list <PICLIST@MITVMA.MIT.EDU>
>To: PICLIST@MITVMA.MIT.EDU
>Subject: Re: [EE:] N channel FET off resistance?
>Date: Tue, 2 Mar 2004 16:21:36 -0500
>
>At 01:03 PM 3/2/2004 -0800, you wrote:
>>ok...ok....so sorry.
>>
>>http://www.linear.com/prod/datasheet.html?datasheet=761
>>
>>look at figure 12 (page 11)
>>
>>I was missing Olin....thanks for setting me straight  :-)
>
><VBG>
>
>And what pin are you pulling low?
>
>Best regards,
>
>Spehro Pefhany --"it's the network..."            "The Journey is the
>reward"
>speff@interlog.com             Info for manufacturers:
>http://www.trexon.com
>Embedded software/hardware/analog  Info for designers:
>http://www.speff.com
>
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