At 09:42 AM 2/26/2004 +0000, you wrote:

>The benchmarks are also mighty suspect to say the least.  For starters no
>source code is shown for most of them, and the cycle count for the PIC's is
>frankly ludicrous e.g.
>
>Shift a 16 bit value right two bits, allegedly the PIC takes 40 cycles!
>
>clrc                    ;1
>rrf  val+1,f    ;1
>rrf  val,f              ;1
>clrc                    ;1
>rrf  val+1,f    ;1
>rrf  val,f              ;1
>
>I make that 6 cycles + a couple for initial bank setting if we are being
>fussy.

I think they are multiplying machine cycles by 4 to get Fosc cycles in
PIC parlance. Make more sense?

>How about sending an 8 bit value out on two pins, SPI style?  They reckon
>the PIC takes 296 cycles to do this!  I can only imagaine the guy who wrote
>the code must be a bit slack, because they'd never make up those numbers now
>would they?


Best regards,

Spehro Pefhany --"it's the network..."            "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com

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