On Wednesday 25 February 2004 07:03 pm, Jinx scribbled:
> > > Also, it might be better to re-enable interrupts only if they were
> >
> > Unfortunately for this app, they must always be enabled
>
> Can you arrange for the code to be executed in between timer
> interrupts ? ie wait until both TMR0 and TMR2 IRQs have just
> occured before entering the EE routine

That will take a bit of thought.  See my other post from a minute ago, wh=
ere I=20
explain how my code is architected.


> In your original code you clear WREN after setting WR. All examples
> I've seen (eg 13.2 in the 16F628 manual amongst others) simply set
> WREN.

My impression is that disabling it helps prevent spurious writes.  I thin=
k I=20
just put it there so that the code can get some work done and out of the =
way=20
while the EEPROM was off doing its thing.


> Have you tried it with that taken out or putting it somewhere
> else? However, once WR is set, anything short of a reset won't stop
> the write so that could be chasing rainbows

I remember something (from the datasheet or an app note) that said that=20
clearing WREN will not stop a write operation once it has been initiated.=
  Of=20
course that's the perfect scenario, if the chips operated exactly as=20
intended.


> IMHO I think you should verfiy that program flow really is getting
> stuck in this routine

I really should re-breadboard it, but so far my test of re-enabling inter=
rupts=20
after waiting for the write operation to be completed seems to re-affirm =
that=20
this is the problem area.  Let me run off and think of an easy way to do =
this=20
in the existing environment.

Cheers,
-Neil.

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