On Tuesday 24 February 2004 01:04 am, Ken Pergola scribbled:
> Hi Neil,
>
> Note that I added BANKSEL directives to your code.
> I'll leave it up to you to see which ones could be removed because of
> redundancy.
> I may have made some boo-boos, so double-check things carefully.
> Like I said before, you can add code to this routine to see if interrup=
ts
> were enabled or not.
> Then based on this boolean condition, you can conditional enable or lea=
ve
> interrupts disabled upon exit.
>
> You might also want to investigate the state of WRERR upon power-up.

This actually won't tell me much for this problem, since the chip does no=
t=20
reset ... the main loop just locks up (my guess is that something causes =
the=20
wait-for-write complete loop not to exit), but the timer interrupts still=
 get=20
called properly.  It feels like I have a stack problem or other timing is=
sue.

> Have you checked all errata notes on the PIC16F627?

Not recently, but a couple months ago I did, and don't remember anything =
major=20
issues around this that could cause this problem.  Perhaps I should re-re=
ad=20
them.

I did try a brand new chip, but no change still.


> Just for kicks, you also might want to check the WR bit to ensure it is
> getting cleared after a write completes.

Hmmm.... I'll go experiment.


> Also (depending upon the situation) it is good practice to point the EE=
PROM
> address register to another unused location upon exit as one of several
> measures to help prevent corruption of the EEPROM location you just wro=
te.

I always thought that the write sequence would prevent that, but it sound=
s=20
fine to me if this has ever been a problem still.


>
>
>
>
> ;-----------------------------------------------------------------
> ; Write data to EEPROM (location supplied in W, data in E_DATA)
> ;-----------------------------------------------------------------
>
> WriteEEData:
>         BANKSEL PIR1
>         bcf     PIR1,EEIF       ; Reset write-complete flag
>
>         BANKSEL EEADR
>         movwf   EEADR
>
>         BANKSEL E_DATA
>         movf    E_DATA,W        ; Get data to be stored
>
>         BANKSEL PIR1
>         bcf     PIR1,EEIF       ; Ensure interrupt flag off while in ba=
nk 0
>
>         BANKSEL EEDATA
>         movwf   EEDATA
>
>       ; Previous BANKSEL also takes care of the following registers
>
>         bsf     EECON1,WREN     ; Enable writes
>         bcf     INTCON,GIE      ; Disable interrupts
>         movlw   H'55'           ; Special seq
>         movwf   EECON2          ; ...
>         movlw   H'AA'           ; ...
>         movwf   EECON2          ; ...
>         bsf     EECON1,WR       ; Start write operation
>         bcf     EECON1,WREN     ; Disable writes
>
>         bsf     INTCON,GIE      ; Re-enable interrupts
>
>         BANKSEL PIR1
>
> WriteEEWait:
>         btfss   PIR1,EEIF       ; Check EEIF flag for write completion
>         goto    WriteEEWait
>
> WriteEEDataDone:
>         return
>
>
>
> Hope this helps more than it hurts. :)


I'll try this out shortly, and get back to you.

Thanks,
-Neil.

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