While single stepping thru the code, I have both the TRIS and PORT registers in the view window. However, I notice when I simply do a movlw 0x04 movwf PORTB I don't always see it update on the view window, and I am following with a banksel TRISB movlw 0x00 movwf TRISB I then sometimes see a change in PORTB. Since the TRIS and DATA are both registers, it wouldn't seem correct that the read back of the value stored in the PORT register is affected by the TRIS value. I'm also only getting around .5V for a high, driving into a gate, for a logic high level. Wierd stuff going on... _________________________________________________________________ Say good-bye to spam, viruses and pop-ups with MSN Premium -- free trial offer! http://click.atdmt.com/AVE/go/onm00200359ave/direct/01/ -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu