Greetings List, I am currently designing a 1GHz fixed frequency output phase locked loop. I am mid way through the design and was just speaking with a colleague on the feasibility of such an application. He seemed to think that this would an extreme undertaking and would be almost impossible to implement with discrete surface mount components on a PWB. I'm new to the field and this has me worried. Can anyone reassure me or does the collective brilliance of the PIClist side with the daunting opinion of my friend. Thanks in advance. Regards, Damien Cahill -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu