Ken Pergola wrote:
> Hey it's nice to see you ask for something. :)

As I said, I've already solved the problem.  I posted it because I thought
some here might find it interesting.  It had me stumped for a whole day.

> 1) How about pull down resistors on the PGC and PGD lines at the
> programmer end of things (not at the target side)?

No need, since these are totem pole outputs of a 16F648A and are actively
driven both ways.  The edges look nice and fast on a scope too.

> 2) You never mentioned what you Vpp rise time is.
>    I'm assuming you don't have any capacitor hanging from /MCLR to
> ground since you did not mention that in your post, correct?

Right, just straight into the MCLR/Vpp pin.  Vpp rise time wasn't the
problem.

> 3) Your target PIC on the breadboard does not have Fosc supplied to it
> correct?

The symptoms were observed with just the bare PIC connected to the 5
programming signals, GND, Vdd, Vpp, PGC, and PGD, via the 20 inch connection
I mentioned.

>    From your post I can infer that you don't have it on the
> breadboard, but if you do, you might need to kill Fosc if your Vpp
> rise time does not meet the programming specification of the current
> PIC.

I was mostly testing with 18F PICs like the 18F1320.  These use Vdd before
Vpp sequence.  It's perfectly normal for these PICs to have power on for a
while before Vpp is raised to 13V.

> 4) Signal line ringing issues due to improper line termination?
> Perhaps 270 ohm series resistors instead of 2000 ohm resistors?

I don't want to go much below 2Kohm for other reasons, but you're getting
close.

> 5) I hope you did not find out that the other target PIC pins not used
> during ICSP are not floating while in programming mode? I hope this
> is not true since the programming specs usually say that they do
> float.

The programming spec seems to be correct in this regard.


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